1. Field of the Invention
The present invention relates to a distortion compensating apparatus and particularly to a distortion compensating apparatus applicable to high-frequency power amplifiers for cellular phones.
2. Description of Related Art
In the past, a cellular phone using the CDMA (Code Division Multiple Access) system always varies terminal's transmission power. The output distribution often peaks approximately 10 mW when the speech communication is used. In many cases, a CDMA cellular phone terminal uses a DC-DC converter to vary power supply voltages of a power amplifier (PA) at low and high outputs so that the efficiency for low outputs is improved. The longer the terminal operates in low-output mode, the less the terminal consumes electric currents. However, as the cellular phone terminal is equipped with many data processing capabilities, the transmission power distribution is shifting to the high output side.
It is expected to output high power as possible especially at low power supply voltages. This ensures low power consumption for the entire terminal. For this purpose, it is important to further increase a power changeover threshold value that switches between a low output and a high output. In low-output mode, the DC-DC converter is used to set a small power supply voltage (e.g., 1.5 V) to be applied to a power amplifier. It is preferable to maximally increase the power output in this state and operate the terminal as long as possible in the low-output mode. This results in reducing the power consumption for the entire terminal.
However, increasing the power changeover threshold value also increases distortion. It is important to decrease distortion also during low output. Distortion compensation technologies are long proposed, but cannot be directly applied to cellular phone terminals in consideration for increase in the circuit scale.
In recent years, there are proposed technologies to improve the distortion by injecting a second harmonic (non-patent documents 1 through 4). FIG. 13 shows a typical constitution. In FIG. 13, a branch circuit (div) 50 branches an input signal into two outputs. One output is input to the gate of a small source-grounded FET (Field Effect Transistor) 51. The FET 51 generates a second harmonic that is then extracted in a band pass filter (BPF) 52. The second harmonic's phase and amplitude is adjusted in a phase circuit (Ph) 53 and an attenuation circuit (ATT) 54, respectively. The second harmonic is then input to a first input terminal of an addition circuit (add) 55. On the other hand, the other output from the branch circuit 50 is input to a second input terminal of the addition circuit 55. The added output is input to an input terminal of a power amplifier (A) 56. Distortion generated from the power amplifier 56 is decreased in such a manner that the phase circuit 53 and the attenuation circuit 54 optimally adjust the phase and the amplitude generated in the FET 51.
[Patent Document 1]
JP-A No. 65465/1998
[Patent Document 2]
JP-A No. 148949/1996
[Non-Patent Document 1]
K. Joshin, Y. Nakasha, T. Iwai, T. Miyashita, S. Ohara, “Harmonic Feedback Circuit Effects on Intermodulation Products and Adjacent Channel Leakage Power in HBT Power Amplifier for 1.9 GHz Wide-Band CDMA Cellular Phones,” IEICE Trans. Electron., vol. E82-C, no. 5, May 1999, pp. 725-729.
[Non-Patent Document 2]
M. R. Moazzam, C. S. Aitchison, “A Low Order Intermodulation Amplifier with Harmonic Feedback Circuitry,” IEEE MTT-S Digest, 1996, WE3F-5.
[Non-Patent Document 3]
D. Jing, W. Chan, S. M. Li, C. W. Li, “New Linearization Method Using Interstage Second Harmonic Enhancement,” IEEE Microwave and Guide Wave Letters, vol. 8, No. 11, pp. 402-404, November 1998.
[Non-Patent Document 4]
N. Males-Ilic, B. Milovanovic, D. Budimir, “Low Intermodulation Amplifiers for RF and Microwave Wireless System,” Asian Pacific Microwave Conference 2001, Proceedings, pp. 984-987.
[Non-Patent Document 5]
S. Kusunoki, T. Furuta and Y. Murakami, “An analysis of higher-order IMD depending on source impedance of a GaAs FET and its application to a design of low distortion MMIC power amplifiers,” Electronics and Communications in Japan, vol. 85, No. 4, pp. 10-21, April 2002, John Wiley and Sons, Inc. NY. USA
(“Analyzing dependency of high-order intermodulation distortion on gate-connected impedance and improving digital modulation distortion of a power amplifier,” the Institute of Electronics, Information and Communication Engineers: Japanese article magazine vol. J83-C, No. 6, pp. 542-552, June 2000)